{"ID":5443750,"CreatedAt":"2026-07-01T02:07:11.383974684Z","UpdatedAt":"2026-07-03T13:50:35.156039308Z","DeletedAt":null,"paper_url":"https://arxiv.org/abs/2606.31681","arxiv_id":"2606.31681","title":"Exploring Side-Channel Protections in Hardware Implementations of PQC ML-KEM Verification","abstract":"As ML-KEM is adopted as a post-quantum cryptographic standard, resilience against physical side-channel attacks has become essential. Among the constituent steps, the decapsulation Fujisaki-Okamoto (FO) verification is particularly vulnerable to side-channel power and electromagnetic (EM) analysis. In this work, we focus on common FPGA-based implementations and examine their side-channel vulnerabilities, and compare them with those of microcontroller implementations. Three verification implementations, unprotected, hash-based (first-order), and higher-order masked, are evaluated for side-channel security on both a microcontroller and an FPGA. While FPGAs offer higher speed and parallelism, they often exhibit stronger side-channel leakage, especially in high bandwidth configurations. The higher-order masked designs still leak information about the underlying data due to hardware-level effects and data-dependent processing. Our experiments show that their parallelized processing on FPGAs introduces sufficient first-order leakage for full secret-key recovery. These results underscore the persistent challenge of securing PQC algorithms in performance-constrained and parallelized hardware environments.","short_abstract":"As ML-KEM is adopted as a post-quantum cryptographic standard, resilience against physical side-channel attacks has become essential. Among the constituent steps, the decapsulation Fujisaki-Okamoto (FO) verification is particularly vulnerable to side-channel power and electromagnetic (EM) analysis. In this work, we foc...","url_abs":"https://arxiv.org/abs/2606.31681","url_pdf":"https://arxiv.org/pdf/2606.31681v1","authors":"[\"Davis Ranney\",\"Yashaswini I Makaram\",\"A. Adam Ding\",\"Yunsi Fei\"]","published":"2026-06-30T13:57:33Z","proceeding":"cs.CR","tasks":"[\"cs.CR\",\"cs.AR\"]","methods":"[]","has_code":false}