{"ID":2897865,"CreatedAt":"2026-06-01T04:54:23.091178241Z","UpdatedAt":"2026-06-01T04:54:23.091178241Z","DeletedAt":null,"paper_url":"https://arxiv.org/abs/2507.04338","arxiv_id":"2507.04338","title":"Voltage Mode Winner-Take-All Circuit for Neuromorphic Systems","abstract":"Recent advances in neuromorphic computing demonstrate on-device learning capabilities with low power consumption. One of the key learning units in these systems is the winner-take-all circuit. In this research, we propose a winner-take-all circuit that can be configured to achieve k-winner and hysteresis properties, simulated in IBM 65 nm node. The circuit dissipated 34.9 $μ$W of power with a latency of 10.4 ns, while processing 1000 inputs. The utility of the circuit is demonstrated for spatial filtering and classification.","short_abstract":"Recent advances in neuromorphic computing demonstrate on-device learning capabilities with low power consumption. One of the key learning units in these systems is the winner-take-all circuit. In this research, we propose a winner-take-all circuit that can be configured to achieve k-winner and hysteresis properties, si...","url_abs":"https://arxiv.org/abs/2507.04338","url_pdf":"https://arxiv.org/pdf/2507.04338v1","authors":"[\"Abdullah M. Zyarah\",\"Dhireesha Kudithipudi\"]","published":"2025-07-06T10:48:47Z","proceeding":"cs.AI","tasks":"[\"cs.AI\"]","methods":"[]","has_code":false}