{"ID":2895093,"CreatedAt":"2026-06-01T04:54:23.091178241Z","UpdatedAt":"2026-06-01T04:54:23.091178241Z","DeletedAt":null,"paper_url":"https://arxiv.org/abs/2507.10849","arxiv_id":"2507.10849","title":"OpenGCRAM: An Open-Source Gain Cell Compiler Enabling Design-Space Exploration for AI Workloads","abstract":"Gain Cell memory (GCRAM) offers higher density and lower power than SRAM, making it a promising candidate for on-chip memory in domain-specific accelerators. To support workloads with varying traffic and lifetime metrics, GCRAM also offers high bandwidth, ultra low leakage power and a wide range of retention times, which can be adjusted through transistor design (like threshold voltage and channel material) and on-the-fly by changing the operating voltage. However, designing and optimizing GCRAM sub-systems can be time-consuming. In this paper, we present OpenGCRAM, an open-source GCRAM compiler capable of generating GCRAM bank circuit designs and DRC- and LVS-clean layouts for commercially available foundry CMOS, while also providing area, delay, and power simulations based on user-specified configurations (e.g., word size and number of words). OpenGCRAM enables fast, accurate, customizable, and optimized GCRAM block generation, reduces design time, ensure process compliance, and delivers performance-tailored memory blocks that meet diverse application requirements.","short_abstract":"Gain Cell memory (GCRAM) offers higher density and lower power than SRAM, making it a promising candidate for on-chip memory in domain-specific accelerators. To support workloads with varying traffic and lifetime metrics, GCRAM also offers high bandwidth, ultra low leakage power and a wide range of retention times, whi...","url_abs":"https://arxiv.org/abs/2507.10849","url_pdf":"https://arxiv.org/pdf/2507.10849v1","authors":"[\"Xinxin Wang\",\"Lixian Yan\",\"Shuhan Liu\",\"Luke Upton\",\"Zhuoqi Cai\",\"Yiming Tan\",\"Shengman Li\",\"Koustav Jana\",\"Peijing Li\",\"Jesse Cirimelli-Low\",\"Thierry Tambe\",\"Matthew Guthaus\",\"H. -S. Philip Wong\"]","published":"2025-07-14T22:43:50Z","proceeding":"cs.AR","tasks":"[\"cs.AR\",\"eess.SY\"]","methods":"[\"LoRA\"]","has_code":false}