{"ID":2881964,"CreatedAt":"2026-06-01T04:54:23.091178241Z","UpdatedAt":"2026-06-01T04:54:23.091178241Z","DeletedAt":null,"paper_url":"https://arxiv.org/abs/2508.11477","arxiv_id":"2508.11477","title":"OpenCXD: An Open Real-Device-Guided Hybrid Evaluation Framework for CXL-SSDs","abstract":"The advent of Compute Express Link (CXL) enables SSDs to participate in the memory hierarchy as large-capacity, byte-addressable memory devices. These CXL-enabled SSDs (CXL-SSDs) offer a promising new tier between DRAM and traditional storage, combining NAND flash density with memory-like access semantics. However, evaluating the performance of CXL-SSDs remains difficult due to the lack of hardware that natively supports the CXL.mem protocol on SSDs. As a result, most prior work relies on hybrid simulators combining CPU models augmented with CXL.mem semantics and SSD simulators that approximate internal flash behaviors. While effective for early-stage exploration, this approach cannot faithfully model firmware-level interactions and low-level storage dynamics critical to CXL-SSD performance. In this paper, we present OpenCXD, a real-device-guided hybrid evaluation framework that bridges the gap between simulation and hardware. OpenCXD integrates a cycle-accurate CXL.mem simulator on the host side with a physical OpenSSD platform running real firmware. This enables in-situ firmware execution triggered by simulated memory requests. Through these contributions, OpenCXD reflects device-level phenomena unobservable in simulation-only setups, providing critical insights for future firmware design tailored to CXL-SSDs.","short_abstract":"The advent of Compute Express Link (CXL) enables SSDs to participate in the memory hierarchy as large-capacity, byte-addressable memory devices. These CXL-enabled SSDs (CXL-SSDs) offer a promising new tier between DRAM and traditional storage, combining NAND flash density with memory-like access semantics. However, eva...","url_abs":"https://arxiv.org/abs/2508.11477","url_pdf":"https://arxiv.org/pdf/2508.11477v1","authors":"[\"Hyunsun Chung\",\"Junhyeok Park\",\"Taewan Noh\",\"Seonghoon Ahn\",\"Kihwan Kim\",\"Ming Zhao\",\"Youngjae Kim\"]","published":"2025-08-15T13:45:14Z","proceeding":"cs.AR","tasks":"[\"cs.AR\",\"cs.ET\",\"cs.OS\"]","methods":"[\"LoRA\"]","has_code":false}