{"ID":2846456,"CreatedAt":"2026-06-01T04:54:23.091178241Z","UpdatedAt":"2026-06-01T04:54:23.091178241Z","DeletedAt":null,"paper_url":"https://arxiv.org/abs/2511.01158","arxiv_id":"2511.01158","title":"A High-Throughput Spiking Neural Network Processor Enabling Synaptic Delay Emulation","abstract":"Synaptic delay has attracted significant attention in neural network dynamics for integrating and processing complex spatiotemporal information. This paper introduces a high-throughput Spiking Neural Network (SNN) processor that supports synaptic delay-based emulation for edge applications. The processor leverages a multicore pipelined architecture with parallel compute engines, capable of real-time processing of the computational load associated with synaptic delays. We develop a SoC prototype of the proposed processor on PYNQ Z2 FPGA platform and evaluate its performance using the Spiking Heidelberg Digits (SHD) benchmark for low-power keyword spotting tasks. The processor achieves 93.4% accuracy in deployment and an average throughput of 104 samples/sec at a typical operating frequency of 125 MHz and 282 mW power consumption.","short_abstract":"Synaptic delay has attracted significant attention in neural network dynamics for integrating and processing complex spatiotemporal information. This paper introduces a high-throughput Spiking Neural Network (SNN) processor that supports synaptic delay-based emulation for edge applications. The processor leverages a mu...","url_abs":"https://arxiv.org/abs/2511.01158","url_pdf":"https://arxiv.org/pdf/2511.01158v1","authors":"[\"Faquan Chen\",\"Qingyang Tian\",\"Ziren Wu\",\"Rendong Ying\",\"Fei Wen\",\"Peilin Liu\"]","published":"2025-11-03T02:12:44Z","proceeding":"cs.NE","tasks":"[\"cs.NE\",\"cs.AI\"]","methods":"[]","has_code":false}