{"ID":2841278,"CreatedAt":"2026-06-01T04:54:23.091178241Z","UpdatedAt":"2026-06-01T04:54:23.091178241Z","DeletedAt":null,"paper_url":"https://arxiv.org/abs/2511.12137","arxiv_id":"2511.12137","title":"A 24-GHz CMOS Transformer-Based Three-Tline Series Doherty Power Amplifier Achieving 39% PAE","abstract":"This paper presents a transformer-based three- transmission-line (Tline) series Doherty power amplifier (PA) implemented in 65-nm CMOS, targeting broadband K/Ka-band applications. By integrating an impedance-scaling network into the output matching structure, the design enables effective load modulation and reduced impedance transformation ratio (ITR) at power back-off when employing stacked cascode transistors. The PA demonstrates a -3-dB small-signal gain bandwidth from 22 to 32.5 GHz, a saturated output power (Psat) of 21.6 dBm, and a peak power-added efficiency (PAE) of 39%. At 6dB back-off, the PAE remains above 24%, validating its suitability for high- efficiency mm-wave phased-array transmitters in next-generation wireless systems.","short_abstract":"This paper presents a transformer-based three- transmission-line (Tline) series Doherty power amplifier (PA) implemented in 65-nm CMOS, targeting broadband K/Ka-band applications. By integrating an impedance-scaling network into the output matching structure, the design enables effective load modulation and reduced imp...","url_abs":"https://arxiv.org/abs/2511.12137","url_pdf":"https://arxiv.org/pdf/2511.12137v1","authors":"[\"Zheng Wang\",\"Yifu Li\",\"Yuchao Mei\",\"Xinyu Sui\",\"Qingbin Li\",\"Xu Luo\",\"Rui Wang\",\"Dongxin Ni\",\"Jian Pang\"]","published":"2025-11-15T10:03:48Z","proceeding":"eess.SP","tasks":"[\"eess.SP\"]","methods":"[\"Transformer\"]","has_code":false}