{"ID":2829085,"CreatedAt":"2026-06-01T04:54:23.091178241Z","UpdatedAt":"2026-06-01T04:54:23.091178241Z","DeletedAt":null,"paper_url":"https://arxiv.org/abs/2512.13591","arxiv_id":"2512.13591","title":"astroCAMP: A Community Benchmark and Co-Design Framework for Sustainable SKA-Scale Radio Imaging","abstract":"The Square Kilometre Array (SKA) will operate one of the world's largest continuous scientific data systems, sustaining petascale imaging under strict power envelopes. Current radio-interferometric pipelines typically achieve only 4-14% of hardware peak utilization due to memory and I/O bottlenecks, incurring high energy, operational, and carbon costs, further compounded by the absence of standardised cross-layer metrics and fidelity tolerances for principled hardware--software co-design. We present astroCAMP, a reproducible benchmarking and co-design framework for SKA-scale imaging, contributing: (1) a unified metric suite spanning performance, utilisation, memory/data-movement, sustainability, economics, and scientific fidelity; (2) standardised SKA-representative datasets and benchmark configurations for reproducible cross-platform evaluation; (3) a multi-objective co-design formulation linking quality constraints to time-, energy-, carbon-, and cost-to-solution; and (4) a design-space exploration workflow to derive Pareto-optimal operating regions. We evaluate WSClean+IDG on an AMD EPYC 9334 CPU and NVIDIA H100 GPU, revealing orchestration and synchronization bottlenecks despite efficient kernels, limited CPU strong scaling, and location-dependent carbon/cost efficiency. We illustrate astroCAMP for heterogeneous CPU--FPGA exploration and call on the SKA community to define quantifiable fidelity thresholds to accelerate principled optimisation for SKA-scale imaging.","short_abstract":"The Square Kilometre Array (SKA) will operate one of the world's largest continuous scientific data systems, sustaining petascale imaging under strict power envelopes. Current radio-interferometric pipelines typically achieve only 4-14% of hardware peak utilization due to memory and I/O bottlenecks, incurring high ener...","url_abs":"https://arxiv.org/abs/2512.13591","url_pdf":"https://arxiv.org/pdf/2512.13591v3","authors":"[\"Denisa-Andreea Constantinescu\",\"Rubén Rodríguez Álvarez\",\"Jacques Morin\",\"Etienne Orliac\",\"Mickaël Dardaillon\",\"Sunrise Wang\",\"Hugo Miomandre\",\"Miguel Peón-Quirós\",\"Jean-François Nezan\",\"David Atienza\"]","published":"2025-12-15T17:47:28Z","proceeding":"cs.DC","tasks":"[\"cs.DC\",\"astro-ph.IM\",\"cs.PF\"]","methods":"[\"LoRA\"]","has_code":false}